The present invention disclosed herein relates to a digital analog converting device, and more particularly, to a pipeline analog digital converting device.
Recently, as a mixed-mode system has been increasingly used, the necessity for an analog digital converter (ADC) tends to be gradually increased. Especially, researches for fabricating one chip through a complementary metal-oxide semiconductor (CMOS) process so as to achieve low manufacturing cost in a system such as a digital video disk player (DVDP) or a direct broadcasting for satellite receiver (DBSR) has been actively in progress. For this, design techniques of an ADC that processes a radio frequency signal (RF) directly stand out as the biggest issue.
A variety of types of ADCs have been suggested until now. A flash ADC, a pipeline ADC, and a successive approximation ADC are used in appropriate application fields depending on their respective characteristics. The flash ADC has a fast operating characteristic typically but its area is doubled each time the resolution is increased by one bit. The successive approximation ADC has low power consumption and simple circuit configuration but its operating frequency is limited. Among ADCs realized until now, while considering an area and power consumption in resolution of 10 bits and an operating frequency of more than 100 MHz, the pipeline ADC is regarded as the most suitable structure.